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[Model] Update Mixtral to have well-formed TIR #225

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merged 1 commit into from
Mar 4, 2024

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Inside a T.block, loop variables may not be used, and access to them must be done through the corresponding T.axis.remap output.

Inside a `T.block`, loop variables may not be used, and access to them
must be done through the corresponding `T.axis.remap` output.
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For context, I frequently use tvm.tir.analysis.verify_well_formed(mod) to debug updates to the MLC-LLM optimization pipeline, and this error was caught by that check.

@vinx13 vinx13 merged commit 0f041ef into batch-serving Mar 4, 2024
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Lunderberg pushed a commit to Lunderberg/mlc-llm that referenced this pull request Apr 1, 2024
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