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Emulation of Monotonic Timers #45

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perlindgren opened this issue Nov 19, 2020 · 0 comments
Open

Emulation of Monotonic Timers #45

perlindgren opened this issue Nov 19, 2020 · 0 comments

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@perlindgren
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perlindgren commented Nov 19, 2020

This is a placeholder for discussing emulation of ARM targets.

Currently we use qemu for examples and some CI tests, on the model of TI Stellaris
S6965

The PAC is hand generated, but there is an svd2rust generated counterpart.
pac

As the qemu model supports TIMERS we could potentially implement monotonic for it and have tests running in CI without HW.

qemu

The Luminary Micro Stellaris LM3S811EVB emulation includes the following devices:

    Cortex-M3 CPU core.

    64k Flash and 8k SRAM.

    Timers, UARTs, ADC and I2C interface.

    OSRAM Pictiva 96x16 OLED with SSD0303 controller on I2C bus.

The Luminary Micro Stellaris LM3S6965EVB emulation includes the following devices:

    Cortex-M3 CPU core.

    256k Flash and 64k SRAM.

    Timers, UARTs, ADC, I2C and SSI interfaces.

    OSRAM Pictiva 128x64 OLED with SSD0323 controller connected via SSI.

Alternatively, we could try out
xpack

A fork of qemu supporting

    STM32F103RB
    STM32F107VC
    STM32F405RG
    STM32F407VG
    STM32F407ZG
    STM32F429ZI
    STM32L152RE

This would potentially allow prototyping and CI testing of timer implementations on popular targets.

Another alternative is to look into the renode project, but that might be harder to get to work in a CI setting.
renode

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